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   5 HEMT design and fabrication 

    5.1 HEMT construction

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In order to increase RF output power it is necessary to decrease the leakage current resulting  from the tunnelling of electrons from the gate metal to the surface of the semiconductor. This can  be accomplished by decreasing the magnitude of the electric field at the gate edge. 

The use of field plate technology has long been recognized as a useful technique for  suppression of voltage at critical locations within a semiconductor device. Schematic figure of GaN/AlGaN HEMT without and with fieldplate is depicted in Fig. 5.1. The field plate  consists of an additional metal layer located over the gate metal (Fig. 5.1 right) and extending into the region  between the gate and drain. The gate metal provides an electric field termination layer that reduces  the magnitude of the field at the gate edge, thereby suppressing the gate leakage current. 

Fig. 5.1 Schematic figure of GaN/AlGaN HEMT without (left) and with (right) fieldplate.

The use of field-plate technology permits high drain bias voltages to be applied, thereby producing improvements in RF output power. In fact, the degree of gate leakage suppression is sufficient to permit drain bias on the order of V DS =100-120 V to be applied. This allows high RF output power to be generated. However, field plates also introduce additional capacitance and reduce the transconductance of the transistor. Therefore a degradation in frequency performance occurs. For this reason, a minimum field-plate length should be employed.⁽¹⁾

The current in convential HEMT is controlled in a way, that the transistor channel is normally open without gate biased . This makes the implementation of HEMT in electrical circuit very complicated and therefore there are atempts to fabricate a normally off transistor with the same advantages as convential HEMT.

The approach using recessed MIS-gate HEMT designated to be used for power applications is shown on Fig. 5.2 top-left.  The epitaxial  layers grown on a silicon substrate consist of a buffer layer  for relaxing the strain between the substrate and GaN-based  layers, an 800-nm-thick AlGaN buffer layer, a 40 nm  thick GaN channel layer, 34/1 nm thick AlGaN/AlN  barrier layers, and a 1-nm-thick GaN cap layer. The layers of  the recessed region were etched by SiCl₄/Cl₂ using inductively  coupled plasma.  A maximum field-effect  mobility of 120 cm²/Vs and a maximum drain current over  200 mA/mm were attained.⁽²⁾

The aproach using fluorine ion implantation of AlGaN barrier designated to be used for RF applications is shown on Fig. 5.2. top-right.  Device isolation was carried out by mesa etching with chlorine-based plasma in an inductively coupled plasma reactive ion etching (ICP-RIE) system.  After the T-gate windows  were opened, the sample was implanted by CF₄ plasma in an reactive ion etching (RIE) system with an RF plasma power of 150 W for 150 s.  The device exhibits a thresh old voltage of +0.2 V, a saturation drain current density of  735 mA/mm,  current-gain cutoff frequency (f_T) is closed to 40 GHz,  and the power-gain cutoff frequency (f_max) presents more than  90-GHz.⁽³⁾

Fig. 5.2 Schematic figures of GaN/AlGaN HEMTs with normally off state using recess on the Schottky gate (top-left), fluorine ion implementation (top-right), p-type gate (bottom-left) and cascode circuit configuration (bottom-right)

The aproach using gate injection transistor (p-gate) designated to be used for switching applications is shown on Fig. 5.2. bottom-right. The gate injection transistor (GIT) utilizes hole injection from the p-type gate to the 2DEG region bringing out the conductivity modulation as observed in insulated-gate bipolar transistors (IGBTs).  This new concept enables both normally-off operation and high  current driving capability by applying high positive gate voltage  with low gate current.  A p-AlGaN/i-AlGaN/GaN  heteroepitaxial structure for the GIT is grown on a Si substrate  with buffer layers consisting of the GaN/AlN multilayers on  top of the AlGaN/AlN initial layers.  The resulting R_ON·A and the breakdown voltage  are 2.6 mΩ·cm² and 800 V, respectively. The GIT achieves a  high drain current of 200 mA/mm with the threshold voltage of  1.0 V.⁽⁴⁾

In order to achieve a simple normally off state HEMT we can use two separate devices forming a circuit called cascode circuit shown on Fig. 5.2 bottom right. The circuit consist of a low voltage normally of Si field effect transistor (FET) interconnected with normally on GaN HEMT. In this configuration the FET controls the HEMT's gate- source  voltage for normally off operation and keeping high voltage capability of HEMT in the same time .

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